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Chapter: Embedded Systems Design : Memory systems

SRAM: Pseudo-static RAM, Battery backed-up SRAM

Pseudo-static RAM is a memory chip that uses DRAM cells to provide a higher memory density but has the refresh control built into the chip and therefore acts like a static RAM.

SRAM

SRAM does not need to be refreshed and will retain data indefinitely — as long as it is powered up. In addition it can be designed to support low power operation and is often used in preference to DRAM for this reason. Although the SRAM cell contains more transistors, the cell only uses power when it is being switched. If the cell is not accessed then the quiescent current is extremely low. DRAM on the other hand has to be refreshed by external bus accesses and these consume a lot of power. As a result, the DRAM memory will have a far higher quiescent current than that of SRAM.

 

The SRAM memory interface is far simpler than that of DRAM and consists of a non-multiplexed address bus and data bus. There is normally a chip select pin which is driven from other address pins to select a particular SRAM when they are used in banks to provide a larger amount of storage.

 

Typical uses for SRAM include building cache memories for very fast processors, being used as main memory in portable equipment where its lower power consumption is important and as expansion memory for microcontrollers.

 

Pseudo-static RAM

 

Pseudo-static RAM is a memory chip that uses DRAM cells to provide a higher memory density but has the refresh control built into the chip and therefore acts like a static RAM. It has been used in portable PCs as an alternative to SRAM because of its low cost. It is not as common as it used to be due to the drop in cost of SRAM and the lower power modes that current synchronous DRAM technology offers.

 

Battery backed-up SRAM

 

The low power consumption of SRAM makes it suitable for conversion into non-volatile memories, i.e. memory that does not lose its data when the main power is removed by adding a small battery to provide power at all times. With the low quiescent current often being less than the battery’s own leakage current, the SRAM can be treated as a non-volatile RAM for the duration of the battery’s life. The CMOS (complementary metal oxide semicon-ductor) memory used by the MAC and IBM PC, which contains the configuration data, is SRAM. It is battery backed-up to ensure it is powered up while the computer is switched off.

 

Some microcontrollers with on-chip SRAM support the connection of an external battery to backup the SRAM contents when the main power is removed.

 

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Embedded Systems Design : Memory systems : SRAM: Pseudo-static RAM, Battery backed-up SRAM |


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