The term parity has been mentioned in the previous para-graphs along with statements that certainly within the PC indus-try it is no longer mandatory and the trend is moving away from its implementations. Parity protection is an additional bit of memory which is used to detect single-bit errors with a block of memory. Typically, one parity bit is used per byte of data. The bit is set to a one or a zero depending on the number of bits that are set to one within the data byte. If this number is odd, the parity bit is set to a one and if the number is even, it is set to zero. This can be reversed to provide two parity schemes known as odd and even parity.
If a bit is changed within the word through an error or fault, then the parity bit will no longer be correct and a comparison of the parity bit and the calculated parity value from the newly read data will disagree. This can then be used to flag a signal back to the processor, such as an error. Note that parity does not allow the error to be corrected nor does it protect from all multiple bit failures such as two set or cleared bits failing together. In addition it requires a parity controller to calculate the value of the parity bit on write cycles and calculate and compare on read cycles. This additional work can slow down memory access and thus the processor performance.
However, for critical embedded systems it is important to know if there has been a memory fault and parity protection may be a requirement.
If parity is used, then it may be necessary for software routines to write to each memory location to clear and/or set up the parity hardware. If this is not done, then it is possible to generate false parity errors.