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Chapter: Embedded Systems Design : Interrupts and exceptions

Interrupt controllers

In many embedded systems there are more external sources for interrupts than interrupt pins on the processor. In this case, it is necessary to use an interrupt controller to provide a larger number of interrupt signals. An interrupt controller performs several functions:

Interrupt controllers

 

In many embedded systems there are more external sources for interrupts than interrupt pins on the processor. In this case, it is necessary to use an interrupt controller to provide a larger number of interrupt signals. An interrupt controller performs several functions:

 

•                                                                         It provides a large number of interrupt pins that can be allocated to many external devices. Typically this is at least eight and higher numbers can be supported by cascading two or more controllers together. This is done on the IBM PC AT where two 8 port controllers are cascaded to give 15 interrupt levels. One level is lost to provide the cascade link.

 

•                                                                         It orders the interrupt pins in a priority level so that a high level interrupt will inhibit a lower level interrupt.

 

•                                                                         It may provide registers for each interrupt pin which con-tain the vector number to be used during an acknowledge cycle. This allows peripherals that do not have the ability to provide a vector to do so.

 

•                                                                         They can provide interrupt masking. This allows the sys-tem software to decide when and if an interrupt is allowed to be serviced. The controller, through the use of masking bits within a controller, can prevent an interrupt request from being passed through to the processor. In this way, the system has a multi-level approach to screening interrupts. It uses the screening provided by the processor to provide coarse grain granularity while the interrupt controller pro-vides a finer level.


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