Fast interrupts

Fast interrupts

There are other interrupt techniques which greatly simplify the whole process but in doing so provide very fast servicing at the expense of several restrictions. These so-called fast interrupts are often used on DSP processors or microcontrollers where a small software routine is executed without saving the processor context.

This type of support is available on the DSP56000 signal processors, for example. External interrupts normally generate a fast interrupt routine exception. The external interrupt is synchro-nised with the processor clock for two successive clocks, at which point the processor fetches the two instructions from the appropri-ate vector location and executes them.

Once completed, the program counter simply carries on as if nothing has happened. The advantage is that there is no stack frame building or any other such delays. The disadvantage con-cerns the size of the routine that can be executed and the resources allocated. When using such a technique, it is usual to allocate a couple of address registers for the fast interrupt routine to use. This allows coefficient tables to be built, almost in parallel with normal execution.

The SCI timer is programmed to generate a two instruction fast interrupt which simply auto-increments register R1. This acts as a simple counter which times the period between events. The event itself generates an IRQA interrupt, which forces a standard service routine. The exception handler jumps to routine VEL which processes the data (i.e. takes the value of R and uses it to compute the period), resets R1 and returns from the interrupt.