§ An MOS (Metal-Oxide-Silicon) structure is created by superimposing several layers of conducting, insulating, and transistor forming materials.
§ After a series of processing steps, a typical structure might consists of levels called diffusion, polysilicon, and metal that are separated by insulating layers.
§ CMOS technology provides two types of transistors, an n-type transistor (n MOS) and a p-type transistor (p MOS).
§ These are fabricated in silicon by using either negatively doped silicon that is rich in electrons (negatively charged) or positively doped silicon that is rich in holes (the dual of electrons and positively charged).
§ For the n-transistor, the structure consists of a section of p-type silicon separating two diffused areas of n-type silicon.
§ The area separating the n regions is capped with a sandwich consisting of an insulator and a conducting electrode called the GATE.
§ Similarly, for the p-transistor the structure consists of a section of n-type silicon separating two p-type diffused areas.
A BRIEF HISTORY
The p-transistor also has a gate electrode. The gate is a control input and it affects the flow of electrical current between the drain and source. The drain and source may be viewed as two switched terminals.
An MOS transistor is termed a majority-carrier device, in which the current in a conducting channel between the source and drain is modulated by a voltage applied to the gate.
In an n-type MOS transistor (i.e.,nMOS), the majority carriers are electrons.
A positive voltage applied on the gate with respect to the substrate enhances the number of electrons in the channel (region immediately under the gate) and hence increases the conductivity of the channel.
The operation of a p-type transistor is analogous to the nMOS transistor, with the exception that the majority carriers are holes and the voltages are negative with respect to the substrate.
The switching behavior of an MOS device is characterized by threshold voltage, Vt. This is defined as the voltage at which an MOS device begins to conduct.
For gate voltage less than a threshold value, the channel is cut-off, thus causing a very low drain- to-source current.
Those devices that are normally cut-off (i.e., non-conducting) with zero gate bias are further classed as enhancement mode devices, whereas those devices that conduct with zero gate bias are called depletion mode devices.