RELIABILITY
Yield and
reliability are two of the cornerstones of a successful IC manufacturing
technology along with product performance and cost. Many factors contribute to
the achievement of high yield and reliability, and many of these also interact
with product performance and cost.
A
fundamental understanding of failure mechanisms and yield limitations enables
the up-front achievement of these technology goals through circuit and layout
design, device design, materials choices, process optimization, and
thermo-mechanical considerations.
Failure
isolation and analysis, defect analysis, low yield analysis, and materials
analysis are critical methodologies for the improvement of yield and
reliability.
Coordination
of people in many disciplines is needed in order to achieve high yield and
reliability. Each needs to understand the impact of their choices and methods
on the final product.
Unfortunately,
very little formal university training exists in these critical areas of IC
reliability, yield, and failure analysis.
1. Reliability Fundamentals and Scaling
Principles
§ The
Reliability Bathtub Curve, Its Origin and Implications
§ Key
Reliability Functions and Their Use in Reliability Analysis
§ Defect
Screening Techniques and Their Effectiveness
§ Accelerated
Testing and Estimation of Useful Operating Life
§ Reliability
Data Collection and Analysis in Integrated Circuits
§ Past
Technology Scaling Trends
2. VLSI Reliability
§ Power
Density Trends: Operating temperature, activation energies for dominant VLSI
failure mechanisms, and reliability impact
§ Reliability
Strategies in Fabless Environments
3. Reliability of the
Interconnect System
§ Physics
and Statistics of Failure Mechanisms Associated with Interconnect Systems
§ Electro-migration
of Al and Cu Interconnects
§ Mechanical
Stress Driven Metal Voiding and Cracking
§ Low k
Materials as Interlayer Dielectrics and Their Impact on Electro-migration
§ Thermo-mechanical
Integrity of the Interconnect System
§ Key
Technology Parameters: Materials choices, structural and geometric effects
§ Extreme
Scaling Impact on Wear-out Time
§ Technology
Solutions: Alloys, metal barriers, and engineering of interfaces
§ Improved
Electro-migration Performance under Non-DC Currents and Short Lines
§ Interconnect
Reliability Strategies in Fabless Environments
4. Transistor
Reliability: Dielectric Breakdown, Hot Carriers and Parametric Stability
§ Physics,
Statistics, and Scaling Impact on Failure Mechanisms
§ Reliability
Performance of Thin Conventional Oxides: Defects, wear-out failures
§ Hot
Carrier Performance and Parametric Stability of P- and N-channel Devices under
DC and AC
§ High k
Gate Dielectrics and Novel Transistor Configurations
§ Key
Failure Mechanisms for Bipolar Transistors
§ Transistor
Reliability Strategies in Fabless Environments
5. CMOS Latch-up and
ESD
§ Physics, Scaling Impact,
and Technology Dependence
of CMOS Latch-up
and
Electrostatic
Damage (ESD)
§ Technology and Design Based Solutions, Device Performance, and Manufacturability
Constraints
§ Latch-up and ESD Assessment in Fabless Environments
6. Soft Errors, and
Other Failure Mechanisms
§ Physics, Scaling Impact,
and Technology Dependence
of Alpha Particle
and Cosmic
Ray
Induced Soft Errors
§ Technology Solutions, Performance, and Manufacturability
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