IC 741 Bipolar operational
amplifier:
The IC
741 produced since 1966 by several manufactures is a widely used general
purpose operational amplifier. Figure shows that equivalent circuit of the 741
op-amp, divided into various individual stages. The op-amp circuit consists of
three stages.
1.
the input differential amplifier
2.
The gain stage
3.
the output stage.
A bias
circuit is used to establish the bias current for whole of the circuit in the
IC. The op-amp is supplied with positive and negative supply voltages of value
± 15V, and the supply voltages as low as ±5V can also be used.
Bias Circuit:
The
reference bias current IREF for the 741 circuit is established by the bias
circuit consisting of two diodes-connected transistors Q11 and Q12
and resistor R5. The widlar current source formed by Q11
, Q10 and R4 provide bias current for the differential
amplifier stage at the collector of Q10.
ransistors
Q8 and Q9 form another current mirror providing bias
current for the differential amplifier. The reference bias current IREF also
provides mirrored and proportional current at the collector of the double
–collector lateral PNP transistor Q13. The transistor Q13
and Q= thus form a two-output current mirror with Q13A providing
bias current for output stage and Q13B providing bias current for Q17.
The transistor Q18 and Q19 provide dc bias for the output
stage. Formed by Q14 and Q20 and they establish two VBE
drops of potential difference between the bases of Q14 and Q18
.
Input stage:
The input
differential amplifier stage consists of transistors Q= through Q7
with biasing provided by Q= through Q12. The transistor Q1
and Q2 form emitter – followers contributing to high differential
input resistance, and whose output currents are inputs to the common base
amplifier using Q3 and Q4 which offers a large voltage
gain.
The
transistors Q5, Q6 and Q7 along with resistors
R1, R2 and R3 from the active load for input
stage. The single-ended output is available at the collector of Q6.the
two null terminals in the input stage facilitate the null adjustment. The
lateral PNP transistors Q3 and Q4 provide additional
protection against voltage breakdown conditions. The emitter-base junction Q3
and Q4 have higher emitter-base breakdown voltages of about 50V.
Therefore, placing PNP transistors in series with NPN transistors provide
protection against accidental shorting of supply to the input terminals.
Gain Stage:
The
Second or the gain stage consists of transistors Q16 and Q17,
with Q16 acting as an emitter – follower for achieving high input
resistance. The transistor Q17 operates in common emitter configuration
with its collector voltage applied as input to the output stage. Level shifting
is done for this signal at this stage.
Internal
compensation through Miller compensation technique is achieved using the
feedback capacitor C1 connected between the output and input terminals of the
gain stage.
Output stage:
The
output stage is a class AB circuit consisting of complementary emitter follower
transistor pair Q14 and Q20 . Hence, they provide an
effective loss output resistance and current gain.
The
output of the gain stage is connected at the base of Q22 , which is connected
as an emitter – follower providing a very high input resistance, and it offers
no appreciable loading effect on the
gain
stage. It is biased by transistor Q13A which also drives Q18
and Q19, that are used for establishing a quiescent bias current in
the output transistors Q14 and Q20.
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