Home | | **Digital Signal Processing** | | **Discrete-Time Signal Processing** | | **Digital Signal Processing** | | **Principles of Digital Signal Processing** | | **Discrete Time Systems and Signal Processing** | Realization Considerations

Linear-phase FIR digital filters can generally be implemented with acceptable coefficient quantization sensitivity using the direct convolution sum method.

**Realization Considerations:**

Linear-phase
FIR digital filters can generally be implemented with acceptable coefficient
quantization sensitivity using the direct convolution sum method. When
implemented in this way on a digital signal processor, fixed-point arithmetic
is not only acceptable but may actually be preferable to floating-point
arithmetic. Virtually all fixed-point digital signal processors accumulate a
sum of products in a double-length accumulator. This means that only a single
quantization is necessary to compute an output. Floating-point arithmetic, on
the other hand, requires a quantization after every multiply and after every
add in the convolution summation. With 32-b floating-point arithmetic these
quantizations introduce a small enough error to be insignificant for many
applications.

When
realizing IIR filters, either a parallel or cascade connection of first- and
second-order subfilters is almost always preferable to a high-order direct-form
realization. With the availability of very low-cost floating-point digital
signal processors, like the Texas Instruments TMS320C32, it is highly
recommended that floating-point arithmetic be used for IIR filters.
Floating-point arithmetic simultaneously eliminates most concerns regarding
scaling, limit cycles, and overflow oscillations. Regardless of the arithmetic
employed, a low roundoff noise structure should be used for the second- order
sections. Good choices are given in [2] and [10]. Recall that realizations with
low fixed-point roundoff noise also have low floating-point roundoff noise. The
use of a low roundoff noise structure for the second-order sections also tends
to give a realization with low coefficient quantization sensitivity.
First-order sections are not as critical in determining the roundoff noise and
coefficient sensitivity of a realization, and so can generally be implemented
with a simple direct form structure.

Study Material, Lecturing Notes, Assignment, Reference, Wiki description explanation, brief detail

Digital Signal Processing - FIR Filter Design : Realization Considerations |

**Related Topics **

Privacy Policy, Terms and Conditions, DMCA Policy and Compliant

Copyright © 2018-2023 BrainKart.com; All Rights Reserved. Developed by Therithal info, Chennai.