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Chapter: Digital Electronics : Minimization Techniques and Logic Gates

Important Short Questions and Answers: Minimization Techniques and Logic Gates

Digital Electronics - Minimization Techniques and Logic Gates - Important Short Questions and Answers: Minimization Techniques and Logic Gates

MINIMIZATION TECHNIQUES AND LOGIC GATES

 

1.         State Demorgan’s Theorem.

 De Morgan suggested two theorems that form important part of Boolean algebra. They are,

 

1) The complement of a product is equal to the sum of the complements.

 

(AB)' = A' + B'



2) The complement of a sum term is equal to the product of the complements.

 

(A + B)' = A'B'



2.    Draw an active-high tri-state buffer and write its truth table.



3.         What is a totem pole output?

 

Totem pole output is a standard output of a TTL gate. It is specifically designed to reduce the propagation delay in the circuit and to provide sufficient output power for high fan-out.


4.    Draw the TTL Inverter (NOT) Circuit.

 


5.    Implement using NAND gates only, F=xyz+x′y′



6.           What are Don’t care terms?

 

In some logic circuits certain input conditions never occur, therefore the corresponding output never appears. In such cases the output level is not defined, it can be either high or low. These output levels are indicated by ‘X’ or ‘d’ in the truth tables and are called don’t care conditions or incompletely specified functions.

 

7.           Apply De-Morgan’s theorem to [(A+B)+C] ′.

Given [(A+B)+C] ′= (A+B) ′.C′

 

= (A′.B′).C′

 

[(A+B)+C] ′ = A′B′C′

 

8.           Convert 0.35 to equivalent hexadecimal number.

Given (0.35)10 =0.35 x 16=5.60 =0.60 x 16=9.60 =0.60 x 16=9.60

 

(0.35)10 =(0.599)16

 

9.           Convert Y=A+BC′+AB+A′BC into canonical form.

 

Given Y=A+BC′+AB+A′BC Y=A(B+B′)(C+C′)+(A+A′)BC′+AB(C+C′)+A′BC Y=ABC+ABC′+AB′C+AB′C′+ABC′+A′BC′+ABC+ABC′+A′BC

Y=ABC+ABC′+AB′C+AB′C′+A′BC′+A′BC

 

 

10.    State the advantages of CMOS logic.

·              Consumes less power.

·              Can be operated at high voltages, resulting in improved noise immunity.

·              Fan-out is more.

·              Better noise margin.

 

11.    Define ‘min term’ and ‘max term’.

(i)          A  product  term  containing  all  the  variables  of  the  function  in  either complemented or uncomplemented form is called a min term.

 

(ii) A sum term containing all the variables of the function in either complemented or uncomplemented form is called a max term.

 

12.    Write a note on tri-state gates.

 

It is a digital circuit that exhibits three states. Two of the states are signals equivalent to logic1 and logic 0. The third state is high impedance state. High impedance state behaves like a open circuit.



13.      Prove that the logical sum of all min terms of a Boolean function of 2 variables is 1.

Consider  two  variables  as  A and  B.  For  two  variables  A and  B  minterms  are:

 

AB,AB,AB,AB. The logical sum of these minterms are given by

F= AB+AB+AB+AB

 

= A′(B+B)+A(B+B)                 (B+B=1)

= A′(1)+A(1)                             (A+A=1)

 

F=1

Hence it is to be proved.

14.    Show that a positive logic NAND gate is a negative logic NOR gate.



Truth table for positive logic NAND gate and negative logic NOR gates are same and hence a positive logic NAND gate is negative logic NOR gate.

 

15.    What is the significance of high impedance state in tri-state gates?

 

·              High impedance state of a three-state gate provides a special feature not available in other gates.

 

·              Because of this features a larger number of three state gate output can be connected with wires to form a common line without endangering loading effects.

 

16.    Simplify the following Boolean Expression to a minimum number of literals.

 

(BC′+A′D)(AB′+CD′)

 

F=(BC′+A′D)(AB′+CD′)

=BC′AB′+BC′CD′+A′DAB′+A′DCD′ (A.A′=0)

= AB B′C′+BCC′D′+AA′ B′D+A′CDD′

 

F=0

 

17.    Define the term Fan out.

 

It is the maximum number of inputs which have same family that the gate can drive maintaining its output within the specified limits.

 

18.    Simplify the given Boolean Expression F=x′+xy+xz′+xy′z′.

F=x′+xy+xz′+xy′z′

= x′+x(y+z′+y′z′)                    (A+A′B=A+B)

 

= x′+y+z′+y′z′

= x′+y+z′(1+y′)                      (1+A′=1)

 

F = x′+y+z′

 

19.    Implement the given function using NAND gates F(x,y,z)= Σm(0,6).

 

F(x,y,z)=x′y′z′+xyz′




20.    State Distributive Law.

 

Distributive law of dot(.) over plus(+) is given by a.(b+c) = a.b + a.c

 

Distributive law of plus(+) over dot(.) is given by a+b.c = (a+b).(a+c)

 

21.    What is Prime Implicant?

 

A prime implicant is a group of minterms which cannot be combined with any other minterms or groups.

 

22.      Simplify the following Boolean expression into one literal. W′X(Z′+YZ)+X(W+ Y′Z)

 

F= W′X(Z′+YZ)+X(W+ Y′Z)

=             W′XZ′+W′XYZ+WX+XY′Z

=X(W′Z′+W′YZ+W+Y′Z)

=             X(W′Z′+W+Z(Y′+W′Y))

=             X(W′Z′+W+Z(Y′+ Y )( Y′+W′))

=             X(W′Z′+W+Z( Y′+W′))

=             X(W′Z′+W+ZY′+W′Z)

=             X(W′(Z′+Z)+W+ZY′)

=             X(W′+W+ZY′)

=             X(1+ZY′)=X.1

F            =X

 

23.    Draw the CMOS inverter circuit.

 


 


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