Memory Access (DMA) is a capability provided by some computer bus architectures
that allows data to be sent directly from an attached device (such as a disk
drive) to the memory on the computer's motherboard. The microprocessor is freed
from involvement with the data transfer, thus speeding up overall computer
DMA, when the CPU is using programmed input/output, it is typically fully
occupied for the entire duration of the read or write operation, and is thus
unavailable to perform other work. With DMA, the CPU initiates the transfer,
does other operations while the transfer is in progress, and receives an
interrupt from the DMA controller when the operation is done.
This feature is useful any time the CPU cannot keep up with
the rate of data transfer, or where the CPU needs to perform useful work while
waiting for a relatively slow I/O data
transfer. Many hardware systems
use DMA, including disk drive controllers, graphics cards, network cards and
ü DMA is
also used for intra-chip data transfer in multi-core processors. Computers that have DMA channels can transfer data to and from devices
with much less CPU overhead than computers without DMA channels. Similarly, a
processing element inside a multi- core processor can transfer data to and from
its local memory without occupying its processor time, allowing computation and
data transfer to proceed in parallel.
1. Modes of operation
ü An entire
block of data is transferred in one contiguous sequence. Once the DMA controller is granted access to the system bus by the CPU,
it transfers all bytes of data in the data block before releasing control of
the system buses back to the CPU, but renders the CPU inactive for relatively
long periods of time. The mode is also called "Block Transfer Mode".
It is also used to stop unnecessary data.
1.2 Cycle stealing mode
ü The cycle
stealing mode is used in systems in which the CPU should not be disabled for
the length of time needed for burst transfer modes.
ü In the
cycle stealing mode, the DMA controller obtains access to the system bus the
same way as in burst mode, using BR (Bus Request) and BG (Bus Grant) signals,
which are the two signals controlling the interface between the CPU and the DMA
in cycle stealing mode, after one byte of data transfer, the control of the
system bus is deasserted to the CPU via BG.
1.3 Transparent mode
transparent mode takes the most time to transfer a block of data, yet it is also the most efficient mode in terms of overall system
performance. The DMA controller only transfers data when the CPU is performing
operations that do not use the system buses.
ü It is the primary advantage of
the transparent mode that the CPU never stops executing
its programs and the DMA transfer is free in terms of time. The disadvantage of
the transparent mode is that the hardware needs to determine when the CPU is
not using the system buses, which can be complex.