D FLIP FLOP:
A D-type flip-flop (data flip-flop) is a single input device. It is basically an SR flipflop, where S is replaced with D and R is replaced D_ (inverted D)—the inverted input is tapped from the D input through an inverter to the R input, as shown below. The inverter ensures that the indeterminate condition (race, or not used state, S = 1, R = 1) never occurs. At the same time, the inverter eliminates the hold condition so that you are left with only set (D = 1) and reset (D = 0) Conditions. The circuit below represents a level-triggered D-type flip-flop.
D FILP FLOP
To create a clocked D-type level-triggered flip-flop, first start with the clocked level-triggered SR flip-flop and throw in the inverter To create a clocked, edge-triggered D-type flip-flop, take a clocked edge-triggered SR flip-flop and add an inverter