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Chapter: Advanced Computer Architecture : Multiple Issue Processors

Important Questions and Answers: Multiple Issue Processors

Advanced Computer Architecture - Multiple Issue Processors - Important Questions and Answers: Multiple Issue Processors


1. What is loop unrolling?


A simple scheme for increasing the number of instructions relative to the branch and overhead instructions is loop unrolling. Unrolling simply replicates the loop body multiple times, adjusting the loop termination code.


2. When static branch predictors are used?


They are used in processors where the expectation is that the branch behavior is highly predictable at compile time. Static predictors are also used to assists dynamic predictors.


3. Mention the different methods to predict branch behavior?


Predict the branch as taken Predict on basis of branch direction (either forward or backward) Predict using profile information collected from earlier runs.


4. Explain the VLIW approach?


They uses multiple, independent functional units. Rather than attempting to issue multiple, independent instructions to the units, a VLIW packages the multiple operations into one very long instruction.


5. Mention the techniques to compact the code size in instructions?


Using encoding techniques Compress the instruction in main memory and expand them when they are read into the cache or are decoded.


6. Mention the advantage of using multiple issue processor?


They are less expensive. They have cache based memory system. More parallelism.


7. What are loop carried dependence?


They focuses on determining whether data accesses in later iterations are dependent on data values produced in earlier iterations; such a dependence is called loop carried dependence. e.g for(i=1000;i>0;i=i-1) x[i]=x[i]+s;


8. Mention the tasks involved in finding dependences in instructions?


Good scheduling of code. Determining which loops might contain parallelism Eliminating name dependence


9. Use the G.C.D test to determine whether dependence exists in the following loop: for(i=1;i<=100;i=i+1) X[2*i+3]=X[2*i]*5.0;


Solution: a=2,b=3,c=2,d=0 GCD(a,c)=2 and d-b=-3 Since 2 does not divide -3, no dependence is possible.


10. What is software pipelining?


Software pipelining is a technique for reorganizing loops such that each iteration in the software pipelined code is made from instruction chosen from different iterations of the original loop.


11. What is global code scheduling?


Global code scheduling aims o compact code fragment with internal control structure into the shortest possible sequence that preserves the data and control dependence. Finding a shortest possible sequence is finding the shortest sequence for the critical path.


12. What is trace?


Trace selection tries to find a likely sequence of basic blocks whose operations will be put together into a smaller number of instructions; this sequence is called trace.


13. Mention the steps followed in trace scheduling?


Trace selection Trace compaction


14. What is superblock?


Superblocks are formed by a process similar to that used for traces, but are a form of extended basic block, which are restricted to a single entry point but allow multiple exits.


15. Mention the advantages of predicated instructions?


Remove control dependence Maintain data flow enforced by branch Reduce overhead of global code scheduling


16. Mention the limitations of predicated instructions?


They are useful only when the predicate can be evaluated early. Predicated instructions may have speed penalty.


17. What is poison bit?


Poison bits are a set of status bits that are attached to the result registers written by the speculated instruction when the instruction causes exceptions. The poison bits cause a fault hen a normal instruction attempts to use the register.


18. What are the disadvantages of supporting speculation in hardware?


Complexity Additional hardware resources required


19. Mention the methods for preserving exception behavior?


Ignore Exception Instructions that never raise exceptions are used Using poison bits Using hardware buffers


20. What is an instruction group?


It is a sequence of consecutive instructions with no register data dependence among them. All the instructions in the group could be executed in parallel. An instruction group can be arbitrarily long.

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