ERROR DETECTION AND CORRECTION
The dynamic physical interaction of
the electrical signals affecting the data pam of a memory unit may cause
occasional errors in storing and retrieving the binary information. The
reliability of a memory unit may be improved by employing error-detecting and
error-correcting codes. The most common error detection scheme is the parity
bit' A parity bit is generated and stored along with the data word in memory.
The parity of the word is checked after reading it from memory. The data word
is accepted if the parity of the bits read out is correct. If the parity
checked results in an inversion. an error is detected, but it cannot be
corrected. An error-correcung code generates multiple parity check bits thai
are stored \\ ith the data word in memory. Each cbcck bit is a parity avera
group of bits in the data word.When the word is read back from memory. The
associated parity bits are also read from mernot) and compared with a new Hamming Code
One of the most common
error-correcting codes used in RAMs was devised by R. W. Hamming.
In the Hamming code. k. parity bits are added 10an n-bit data
word. forming a new word of n + k
bits. The hit positions are numbered in sequence from I to n + k, These positions
numbered as a power of2 arc reserved for the parity bits. The remaining bits
are the data bits.
The code can beused with words of
any length. Before giving the general characteristics of the code. we will
illustrate its operation with a data word of eight bib .
Consider. for example. the 8-bil
data word I10001no.We include ~ parity bits with the 8-bit word and arrange the
12 bits as follows: Bil position: I PI
2 3 4 5 6 7 8 9 10 II 12 Pl IP4 1 0 0 f\ 0 1 0 0