Analog multiplier using an Emitter coupled Transistor pair

**Analog
multiplier using an Emitter coupled Transistor pair:**

The
output currents IC1 an d IC2 are related to the differential input voltage V_{1} by

where
V is thermal voltage and the base currents have been neglected. Combining above
eqn., difference between=the two output− currents as

The
dc transfer characteristics of the emitter – coupled pair is shown in figure.
It shows that the emitter coupled pair can be used as a simple multiplier using
this configuration. When the differential input voltage V_{1} << V_{T}, we can
appropriate as given by

∆I_{C}
=I_{EE} ( V_{1}/2V_{T})

The
current I_{EE} is the bias current for the emitter – coupled pair. If
the current I_{EE} is made proportional to a second input signal V_{2},
then

I_{EE}
=K_{0} (V_{2} - V_{BE})/2V_{T}

Substituting
above eqn. , we get ∆I_{C} = K_{0}V_{1} (V_{2} -
V_{BE})/2V_{T}

This
arrangement is shown in figure. It is a simple modulator circuit constructed
using a differential amplifier. It can be used as a multiplier, provided V_{1} is small and much less than 50mV
and V_{2} is greater than V_{BE} (on). But, the multiplier
circuit shown in figure has several limitations. The first limitation is that V_{2}
is offset by V_{BE} (on).

The
second is that V_{2} must always be positive which results in only a
two-quadrant multiplier operation. The third limitation is that, the tanh (X)
is approximately as X, where X = V_{1}
/2VT. The first two limitations are overcome in the Gilbert cell.

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Linear Integrated Circuits : Analog Multiplier and PLL : Analog multiplier using an Emitter coupled Transistor pair |

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