STEADY STATE PERFORMANCE EVALUATION
The control loop must regulate the output voltage VI so that the error is made equal to zero. It is also imperative that the response must be reasonably fast, yet not cause any instability problem.
The performance of the AVR loop is measured by its ability to regulate the terminal voltage of the generator within prescribed static accuracy limit with an acceptable speed of response. Suppose the static accuracy limit is denoted by Ac in percentage with reference to the nominal value.
The error voltage is to be less than (Ac/100)∆|V|ref.
From the block diagram, for a steady state error voltage ∆e;
Larger the overall gain of the forward block gain K smaller is the steady state error. But too large a gain K cans instability