FIFOs and Circular buffers

FIFOs

FIFOs or first in, first out are a special form of buffer that uses memory to form an orderly queue to hold information. Its most important attribute is that the data can be extracted in the same way as it was entered. These are used frequently within serial comms chips to hold data temporarily while the processor is busy and cannot immediately service the peripheral. Instead of losing data, it is placed in the FIFO and extracted later. Many of the buffers described so far use a FIFO architecture.

Their implantation can be done either in software or more commonly with special memory chips that automatically main-tain the pointers that are needed to control and order the data.

Circular buffers

Circular buffers are a special type of buffer where the data is circulated around a buffer. In this way they are similar to a single buffer that moves the next data pointer to the start of the buffer to access the next data. In this way the address pointer circulates around the addresses. In that particular case, care was taken so that no data was lost. It is possible to use such a buffer and lose data to provide a different type of buffer structure. This is known as a circular buffer where the input data is allowed to overwrite the last data entries. This keeps the most recent data at the expense of losing some of the older data. This is useful for capturing trace data where a trace buffer may be used to hold the last n data samples where n is the size of the buffer. By doing this, the buffer updating can be frozen at any point and the last n samples can be captured for examination. This technique is frequently used to create trace and history buffers for test equipment and data loggers.

This circular structure is also a very good match for coeffi-cient tables used in digital signal processing where the algorithm iterates around various tables performing arithmetic operations to perform the algorithm.

The only problem is that the next data pointer must be checked to know when to reset it to the beginning of the buffer. This provides some additional overhead. Many DSPs provide a special modulo addressing mode that will automatically reset the address for a particular buffer size. This buffer size is normally restricted to a power of two.