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# Digital Electronics - EC6302

## MINIMIZATION TECHNIQUES AND LOGIC GATES

-:- Boolean Postulates and Laws
-:- De-Morganâ€™s Theorem
-:- Minimization of Boolean Expressions
-:- Sum-of-Products (SOP) Form
-:- Standard SOP Form & Minterms
-:- Product-of-Sums (POS) Form
-:- Standard POS Form & Maxterms
-:- Keeping Circuits Simple (Karnaugh Maps)
-:- Quine Mccluskey (Tabular) Minimization
-:- Logic Gates
-:- NAND-NOR Implementations
-:- TTL Family of ICS
-:- CMOS Family of ICs
-:- Tristate Gates
-:- Important Short Questions and Answers: Minimization Techniques and Logic Gates

## COMBINATIONAL CIRCUITS

-:- Half and Full Subtractor
-:- Bit Binary Parallel Adder and Subtractor
-:- Carry Propagation and The Look-Ahead Carry Circuit
-:- Serial Adder With Accumulator and Serial Subtractor
-:- Binary Multiplier
-:- Multiplexer
-:- De-Multiplexers
-:- Encoders
-:- Decoders
-:- Parity Generator and Checker
-:- Code Converters
-:- Comparator
-:- Important Short Questions and Answers: Digital Electronics - Combinational Circuits

## SEQUENTIAL CIRCUITS

-:- SR Flip Flop
-:- D Flip Flop
-:- JK Flip-Flops
-:- Master-Slave Flip-Flops
-:- Synchronous Counter
-:- Synchronous and Asynchronous Up /Down Counter
-:- Design of Synchronous Counters
-:- The Shift Register
-:- Universal Shift Register
-:- The Ring Counter
-:- Johnson Ring Counter
-:- Important Short Questions and Answers: Sequential Circuits

## MEMORY DEVICES

-:- Classifications of Memory
-:- Types of RAM
-:- Types of ROM
-:- Hybrid Memory Types
-:- Programmable Logic Devices(PLD)
-:- Fixed Logic Versus Programmable Logic
-:- Programmable Logic Devices - An Overview
-:- Memory Hierarchy
-:- Important Short Questions and Answers: Digital Electronics - Memory Devices

## SYNCHRONOUS AND ASYNCHRONOUS SEQUENTIAL CIRCUITS

-:- Synchronous and Asynchronous Sequential Circuits
-:- Synchronous Sequential Circuit
-:- Concept of Sequential Logic
-:- Latches and Flip-Flops
-:- Sequential Circuits Design Procedures
-:- Sequential Circuits Analysis Procedures
-:- Analysis With D Flip-Flops
-:- Analysis With JK Flip-Flops
-:- Analysis With T Flip-Flops
-:- Mealy and Moore Models
-:- State Reduction & Assignment
-:- Shift Registers
-:- Counters
-:- HDL For Sequential Circuits
-:- Asynchronous Sequential Circuits - Introduction
-:- Analysis Procedure - Asynchronous Sequential Circuits
-:- Race-Free State Assignment
-:- Hazards in Combinational Circuits and Sequential Circuits
-:- ASM Chart
-:- Important Short Questions and Answers: Synchronous and Asynchronous Sequential Circuits