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Chapter: VLSI Design : Circuit Characterization and Simulation

Transistor Sizing

Not all gates need to have the same delay.

TRANSISTOR SIZING

 

§   Not all gates need to have the same delay.

 

§   Not all inputs to a gate need to have the same delay.

 

§   Adjust transistor sizes to achieve desired delay. Example: Adder carry chain Inter-stage effects in transistor sizing

 

§   Increasing a gate’s drive also increases the load to the previous stage

 


 

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VLSI Design : Circuit Characterization and Simulation : Transistor Sizing |


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