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Chapter: Embedded Systems Design : Embedded processors

The Berkeley RISC model

The RISC 1 computer implemented in the late 1970s used a very large register set of 138 × 32 bit registers. These were arranged in eight overlapping windows of 24 registers each.

The Berkeley RISC model

 

The RISC 1 computer implemented in the late 1970s used a very large register set of 138 × 32 bit registers. These were arranged in eight overlapping windows of 24 registers each. Each window was split so that six registers could be used for parameter passing during subroutine calls. A pointer was simply changed to select the group of six registers. To perform a basic call or return simply needed a change of pointer. The large number of registers is needed to minimise the number of fetches to the outside world. With this simple window technique, procedure calls can be per-formed extremely quickly. This can be very beneficial for real-time applications where fast responses are necessary.

 

However, it is not without its disadvantages. If the proce-dure calls require more than six variables, one register must be used to point to an array stored in external memory. This data must be loaded prior to any processing and the register windowing loses much of its performance. If all the overlapping windows are used, the system resolves the situation by tracking the window usage so either a window or the complete register set can be saved out to external memory.


This overhead may negate any advantages that windowing gave in the first place. In real-time applications, the overhead of saving 138 registers to memory greatly increases the context switch and hence the response time. A good example of this approach is the Sun SPARC processor.


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