• The full adder is used to perform bit by bit addition and D-Flip flop is used to store the carry output generated after addition.
• This carry is used to carry input for the next addition. Initially the D Flip flop is cleared and addition starts with the least significant bits of both register.
• After each clock pulse data within the right shift registers are shifted right 1-bit and We get from next digit and carry of precious addition as new inputs for the full adder.
In this circuit, we have Input number coming bit by bit and output comes bit by bit and the final borrow at the end:
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